Information

81
MAP
BGA
80
LQF
P
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
A2 78 PTD5 /
ADC0_SE6
b
/
ADC0_SE6
b
PTD5 SPI0_PCS2 UART0_CT
S_b
FTM0_CH5 FB_AD1 EWM_OUT
_b
B2 79 PTD6/
LLWU_P15
/
ADC0_SE7
b
/
ADC0_SE7
b
PTD6/
LLWU_P15
SPI0_PCS3 UART0_RX FTM0_CH6 FB_AD0 FTM0_FLT0
A1 80 PTD7 PTD7 CMT_IRO UART0_TX FTM0_CH7 FTM0_FLT1
L7 — RESERVED RESERVED RESERVED
A11 — NC NC NC
B11 — NC NC NC
C11 — NC NC NC
K3 — NC NC NC
H4 — NC NC NC
F3 — NC NC NC
H1 — NC NC NC
H2 — NC NC NC
J1 — NC NC NC
J2 — NC NC NC
J3 — NC NC NC
H3 — NC NC NC
K4 — NC NC NC
H5 — NC NC NC
J5 — NC NC NC
H6 — NC NC NC
J9 — NC NC NC
J4 — NC NC NC
H11 — NC NC NC
F11 — NC NC NC
E11 — NC NC NC
D11 — NC NC NC
E10 — NC NC NC
F10 — NC NC NC
F9 — NC NC NC
F8 — NC NC NC
E8 — NC NC NC
B6 — NC NC NC
A6 — NC NC NC
A5 — NC NC NC
B5 — NC NC NC
B4 — NC NC NC
A4 — NC NC NC
Chapter 10 Signal Multiplexing and Signal Descriptions
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 225