Information

PORT memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_C030 Pin Control Register n (PORTD_PCR12) 32 R/W 0000_0000h 11.4.1/248
4004_C034 Pin Control Register n (PORTD_PCR13) 32 R/W 0000_0000h 11.4.1/248
4004_C038 Pin Control Register n (PORTD_PCR14) 32 R/W 0000_0000h 11.4.1/248
4004_C03C Pin Control Register n (PORTD_PCR15) 32 R/W 0000_0000h 11.4.1/248
4004_C040 Pin Control Register n (PORTD_PCR16) 32 R/W 0000_0000h 11.4.1/248
4004_C044 Pin Control Register n (PORTD_PCR17) 32 R/W 0000_0000h 11.4.1/248
4004_C048 Pin Control Register n (PORTD_PCR18) 32 R/W 0000_0000h 11.4.1/248
4004_C04C Pin Control Register n (PORTD_PCR19) 32 R/W 0000_0000h 11.4.1/248
4004_C050 Pin Control Register n (PORTD_PCR20) 32 R/W 0000_0000h 11.4.1/248
4004_C054 Pin Control Register n (PORTD_PCR21) 32 R/W 0000_0000h 11.4.1/248
4004_C058 Pin Control Register n (PORTD_PCR22) 32 R/W 0000_0000h 11.4.1/248
4004_C05C Pin Control Register n (PORTD_PCR23) 32 R/W 0000_0000h 11.4.1/248
4004_C060 Pin Control Register n (PORTD_PCR24) 32 R/W 0000_0000h 11.4.1/248
4004_C064 Pin Control Register n (PORTD_PCR25) 32 R/W 0000_0000h 11.4.1/248
4004_C068 Pin Control Register n (PORTD_PCR26) 32 R/W 0000_0000h 11.4.1/248
4004_C06C Pin Control Register n (PORTD_PCR27) 32 R/W 0000_0000h 11.4.1/248
4004_C070 Pin Control Register n (PORTD_PCR28) 32 R/W 0000_0000h 11.4.1/248
4004_C074 Pin Control Register n (PORTD_PCR29) 32 R/W 0000_0000h 11.4.1/248
4004_C078 Pin Control Register n (PORTD_PCR30) 32 R/W 0000_0000h 11.4.1/248
4004_C07C Pin Control Register n (PORTD_PCR31) 32 R/W 0000_0000h 11.4.1/248
4004_C080 Global Pin Control Low Register (PORTD_GPCLR) 32
W
(always
reads
zero)
0000_0000h 11.4.2/250
4004_C084 Global Pin Control High Register (PORTD_GPCHR) 32
W
(always
reads
zero)
0000_0000h 11.4.3/251
4004_C0A0 Interrupt Status Flag Register (PORTD_ISFR) 32 w1c 0000_0000h 11.4.4/251
4004_C0C0 Digital Filter Enable Register (PORTD_DFER) 32 R/W 0000_0000h 11.4.5/252
4004_C0C4 Digital Filter Clock Register (PORTD_DFCR) 32 R/W 0000_0000h 11.4.6/253
4004_C0C8 Digital Filter Width Register (PORTD_DFWR) 32 R/W 0000_0000h 11.4.7/253
4004_D000 Pin Control Register n (PORTE_PCR0) 32 R/W 0000_0000h 11.4.1/248
4004_D004 Pin Control Register n (PORTE_PCR1) 32 R/W 0000_0000h 11.4.1/248
4004_D008 Pin Control Register n (PORTE_PCR2) 32 R/W 0000_0000h 11.4.1/248
4004_D00C Pin Control Register n (PORTE_PCR3) 32 R/W 0000_0000h 11.4.1/248
Table continues on the next page...
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
246 Freescale Semiconductor, Inc.