Information
Section Number Title Page
31.1.3 Modes of operation......................................................................................................................................710
31.2 Memory map and register descriptions.........................................................................................................................710
31.2.1 CRC Data Register (CRC_CRC).................................................................................................................711
31.2.2 CRC Polynomial Register (CRC_GPOLY).................................................................................................712
31.2.3 CRC Control Register (CRC_CTRL)..........................................................................................................713
31.3 Functional description...................................................................................................................................................714
31.3.1 CRC initialization/re-initialization...............................................................................................................714
31.3.2 CRC calculations..........................................................................................................................................714
31.3.3 Transpose feature.........................................................................................................................................715
31.3.4 CRC result complement...............................................................................................................................717
Chapter 32
Analog-to-Digital Converter (ADC)
32.1 Introduction...................................................................................................................................................................719
32.1.1 Features........................................................................................................................................................719
32.1.2 Block diagram..............................................................................................................................................720
32.2 ADC Signal Descriptions..............................................................................................................................................721
32.2.1 Analog power (VDDA)................................................................................................................................722
32.2.2 Analog ground (VSSA)................................................................................................................................722
32.2.3 Voltage reference select...............................................................................................................................722
32.2.4 Analog channel inputs (ADx)......................................................................................................................723
32.2.5 Differential analog channel inputs (DADx).................................................................................................723
32.3 Register Definition........................................................................................................................................................723
32.3.1 ADC status and control registers 1 (ADCx_SC1n)......................................................................................726
32.3.2 ADC configuration register 1 (ADCx_CFG1).............................................................................................729
32.3.3 Configuration register 2 (ADCx_CFG2)......................................................................................................731
32.3.4 ADC data result register (ADCx_Rn)..........................................................................................................732
32.3.5 Compare value registers (ADCx_CVn).......................................................................................................733
32.3.6 Status and control register 2 (ADCx_SC2)..................................................................................................734
32.3.7 Status and control register 3 (ADCx_SC3)..................................................................................................736
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
26 Freescale Semiconductor, Inc.
