Information

Section Number Title Page
36.3.11 Pulse-Out n Enable Register (PDBx_POnEN).............................................................................................839
36.3.12 Pulse-Out n Delay Register (PDBx_POnDLY)...........................................................................................839
36.4 Functional Description..................................................................................................................................................840
36.4.1 PDB Pre-trigger and Trigger Outputs..........................................................................................................840
36.4.2 PDB Trigger Input Source Selection...........................................................................................................842
36.4.3 DAC Interval Trigger Outputs.....................................................................................................................842
36.4.4 Pulse-Out's...................................................................................................................................................843
36.4.5 Updating the Delay Registers......................................................................................................................843
36.4.6 Interrupts......................................................................................................................................................845
36.4.7 DMA............................................................................................................................................................845
36.5 Application Information................................................................................................................................................845
36.5.1 Impact of Using the Prescaler and Multiplication Factor on Timing Resolution........................................845
Chapter 37
FlexTimer (FTM)
37.1 Introduction...................................................................................................................................................................847
37.1.1 FlexTimer Philosophy..................................................................................................................................847
37.1.2 Features........................................................................................................................................................848
37.1.3 Modes of Operation.....................................................................................................................................849
37.1.4 Block Diagram.............................................................................................................................................849
37.2 FTM Signal Descriptions..............................................................................................................................................852
37.2.1 EXTCLK — FTM External Clock...............................................................................................................852
37.2.2 CHn — FTM Channel (n) I/O Pin...............................................................................................................852
37.2.3 FAULTj — FTM Fault Input.......................................................................................................................852
37.2.4 PHA — FTM Quadrature Decoder Phase A Input......................................................................................853
37.2.5 PHB — FTM Quadrature Decoder Phase B Input.......................................................................................853
37.3 Memory Map and Register Definition..........................................................................................................................853
37.3.1 Module Memory Map..................................................................................................................................853
37.3.2 Register Descriptions...................................................................................................................................853
37.3.3 Status and Control (FTMx_SC)...................................................................................................................860
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 31