Information

NOTE
This register is unaffected by wakeup from low leakage modes
(exit from LLS via RESET or any exit from VLLS).
Address: LLWU_PE2 is 4007_C000h base + 1h offset = 4007_C001h
Bit 7 6 5 4 3 2 1 0
Read
WUPE7 WUPE6 WUPE5 WUPE4
Write
Reset
0 0 0 0 0 0 0 0
LLWU_PE2 field descriptions
Field Description
7–6
WUPE7
Wakeup Pin Enable for LLWU_P7
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
5–4
WUPE6
Wakeup Pin Enable for LLWU_P6
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
3–2
WUPE5
Wakeup Pin Enable for LLWU_P5
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
1–0
WUPE4
Wakeup Pin Enable for LLWU_P4
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
Chapter 15 Low-leakage wake-up unit (LLWU)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 327