Information

Section Number Title Page
37.4.3 Counter.........................................................................................................................................................906
37.4.4 Input Capture Mode.....................................................................................................................................911
37.4.5 Output Compare Mode.................................................................................................................................914
37.4.6 Edge-Aligned PWM (EPWM) Mode...........................................................................................................915
37.4.7 Center-Aligned PWM (CPWM) Mode........................................................................................................917
37.4.8 Combine Mode.............................................................................................................................................918
37.4.9 Complementary Mode..................................................................................................................................926
37.4.10 Registers Updated from Write Buffers........................................................................................................927
37.4.11 PWM Synchronization.................................................................................................................................929
37.4.12 Inverting.......................................................................................................................................................945
37.4.13 Software Output Control..............................................................................................................................946
37.4.14 Deadtime Insertion.......................................................................................................................................948
37.4.15 Output Mask.................................................................................................................................................951
37.4.16 Fault Control................................................................................................................................................952
37.4.17 Polarity Control............................................................................................................................................955
37.4.18 Initialization.................................................................................................................................................956
37.4.19 Features Priority...........................................................................................................................................956
37.4.20 Channel Trigger Output...............................................................................................................................957
37.4.21 Initialization Trigger....................................................................................................................................958
37.4.22 Capture Test Mode.......................................................................................................................................960
37.4.23 DMA............................................................................................................................................................961
37.4.24 Dual Edge Capture Mode.............................................................................................................................962
37.4.25 Quadrature Decoder Mode...........................................................................................................................969
37.4.26 BDM Mode..................................................................................................................................................974
37.4.27 Intermediate Load........................................................................................................................................975
37.4.28 Global Time Base (GTB).............................................................................................................................977
37.5 Reset Overview.............................................................................................................................................................978
37.6 FTM Interrupts..............................................................................................................................................................980
37.6.1 Timer Overflow Interrupt.............................................................................................................................980
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 33