Information

MCM_SRAMAP field descriptions (continued)
Field Description
01 Special round robin (favors SRAM backoor accesses over the processor)
10 Fixed priority. Processor has highest, backdoor has lowest
11 Fixed priority. Backdoor has highest, processor has lowest
27
Reserved
This read-only field is reserved and always has the value zero.
26
SRAMUWP
SRAM_U write protect
When this bit is set, writes to SRAM_U array generates a bus error.
25–24
SRAMUAP
SRAM_U arbitration priority
Defines the arbitration scheme and priority for the processor and SRAM backdoor accesses to the
SRAM_U array.
00 Round robin
01 Special round robin (favors SRAM backoor accesses over the processor)
10 Fixed priority. Processor has highest, backdoor has lowest
11 Fixed priority. Backdoor has highest, processor has lowest
23–9
Reserved
This field is reserved.
8–0
Reserved
This field is reserved.
16.2.4 Interrupt status register (MCM_ISR)
Address: MCM_ISR is E008_0000h base + 10h offset = E008_0010h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 0 NMI IRQ 0
W
w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MCM_ISR field descriptions
Field Description
31–4
Reserved
This read-only field is reserved and always has the value zero.
3
Reserved
This read-only field is reserved and always has the value zero.
Table continues on the next page...
Memory Map/Register Descriptions
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
344 Freescale Semiconductor, Inc.