Information

Section Number Title Page
3.2 Core modules................................................................................................................................................................65
3.2.1 ARM Cortex-M4 Core Configuration..........................................................................................................65
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration......................................................................68
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC) Configuration.........................................................74
3.2.4 JTAG Controller Configuration...................................................................................................................75
3.3 System modules............................................................................................................................................................76
3.3.1 SIM Configuration.......................................................................................................................................76
3.3.2 Mode Controller Configuration...................................................................................................................77
3.3.3 PMC Configuration......................................................................................................................................77
3.3.4 Low-Leakage Wake-up Unit (LLWU) Configuration.................................................................................78
3.3.5 MCM Configuration....................................................................................................................................80
3.3.6 Crossbar Switch Configuration....................................................................................................................80
3.3.7 Memory Protection Unit (MPU) Configuration...........................................................................................83
3.3.8 Peripheral Bridge Configuration..................................................................................................................85
3.3.9 DMA request multiplexer configuration......................................................................................................87
3.3.10 DMA Controller Configuration...................................................................................................................90
3.3.11 External Watchdog Monitor (EWM) Configuration....................................................................................91
3.3.12 Watchdog Configuration..............................................................................................................................92
3.4 Clock Modules..............................................................................................................................................................93
3.4.1 MCG Configuration.....................................................................................................................................93
3.4.2 OSC Configuration......................................................................................................................................94
3.4.3 RTC OSC configuration...............................................................................................................................95
3.5 Memories and Memory Interfaces................................................................................................................................95
3.5.1 Flash Memory Configuration.......................................................................................................................95
3.5.2 Flash Memory Controller Configuration.....................................................................................................98
3.5.3 SRAM Configuration...................................................................................................................................99
3.5.4 SRAM Controller Configuration.................................................................................................................103
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
4 Freescale Semiconductor, Inc.