Information

DMA_TCDn_CSR field descriptions (continued)
Field Description
0 The half-point interrupt is disabled
1 The half-point interrupt is enabled
1
INTMAJOR
Enable an interrupt when major iteration count completes
If this flag is set, the channel generates an interrupt request by setting the appropriate bit in the INT when
the current major iteration count reaches zero.
0 The end-of-major loop interrupt is disabled
1 The end-of-major loop interrupt is enabled
0
START
Channel Start
If this flag is set, the channel is requesting service. The eDMA hardware automatically clears this flag after
the channel begins execution.
0 The channel is not explicitly started
1 The channel is explicitly started via a software initiated service request
21.3.30 TCD Beginning Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD_BITER_ELINKYES)
If the TCDn_BITER[ELINK] bit is set, the TCDn_BITER register is defined as follows.
Addresses: 4000_8000h base + 101Eh offset + (32d × n), where n = 0d to 15d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
ELINK
0
LINKCH BITER
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_BITER_ELINKYES field descriptions
Field Description
15
ELINK
Enables channel-to-channel linking on minor loop complete
As the channel completes the minor loop, this flag enables the linking to another channel, defined by
BITER[LINKCH]. The link target channel initiates a channel service request via an internal mechanism
that sets the TCDn_CSR[START] bit of the specified channel. If channel linking disables, the BITER value
extends to 15 bits in place of a link channel number. If the major loop is exhausted, this link mechanism is
suppressed in favor of the MAJORELINK channel linking.
NOTE: When the software loads the TCD, this field must be set equal to the corresponding CITER field.
Otherwise, a configuration error is reported. As the major iteration count is exhausted, the
contents of this field is reloaded into the CITER field.
Table continues on the next page...
Memory map/register definition
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
468 Freescale Semiconductor, Inc.