Information

Section Number Title Page
52.6.2 SCAN control register (TSIx_SCANC).......................................................................................................1577
52.6.3 Pin enable register (TSIx_PEN)...................................................................................................................1580
52.6.4 Status Register (TSIx_STATUS).................................................................................................................1583
52.6.5 Counter Register (TSIx_CNTRn)................................................................................................................1586
52.6.6 Channel n threshold register (TSIx_THRESHLDn)....................................................................................1587
52.7 Functional descriptions.................................................................................................................................................1587
52.7.1 Capacitance measurement............................................................................................................................1587
52.7.2 TSI measurement result...............................................................................................................................1590
52.7.3 Electrode scan unit.......................................................................................................................................1591
52.7.4 Touch detection unit.....................................................................................................................................1594
52.8 Application information................................................................................................................................................1595
52.8.1 TSI module sensitivity.................................................................................................................................1595
Chapter 53
JTAG Controller (JTAGC)
53.1 Introduction...................................................................................................................................................................1597
53.1.1 Block diagram..............................................................................................................................................1597
53.1.2 Features........................................................................................................................................................1598
53.1.3 Modes of operation......................................................................................................................................1598
53.2 External signal description............................................................................................................................................1600
53.2.1 TCK—Test clock input................................................................................................................................1600
53.2.2 TDI—Test data input...................................................................................................................................1600
53.2.3 TDO—Test data output................................................................................................................................1600
53.2.4 TMS—Test mode select...............................................................................................................................1600
53.3 Register description......................................................................................................................................................1601
53.3.1 Instruction register.......................................................................................................................................1601
53.3.2 Bypass register.............................................................................................................................................1601
53.3.3 Device identification register.......................................................................................................................1601
53.3.4 Boundary scan register.................................................................................................................................1602
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 51