Information

28.4.1 Program Flash Memory Swap
For devices that only contain program flash memory: The user can configure the logical
memory map of the program flash space such that either of the two physical program
flash blocks can exist at relative address 0x0000. This swap feature enables the lower half
of the logical program flash space to be operational while the upper half is being updated
for future use.
The Swap Control command handles swapping the two logical P-Flash memory blocks
within the memory map. See Swap Control Command for details.
28.4.2 Interrupts
The FTFL module can generate interrupt requests to the MCU upon the occurrence of
various FTFL events. These interrupt events and their associated status and control bits
are shown in the following table.
Table 28-24. FTFL Interrupt Sources
FTFL Event Readable
Status Bit
Interrupt
Enable Bit
FTFL Command Complete FSTAT[CCIF] FCNFG[CCIE]
FTFL Read Collision Error FSTAT[RDCOLERR] FCNFG[RDCOLLIE]
Note
Vector addresses and their relative interrupt priority are
determined at the MCU level.
Flash Operation in Low-Power Modes
28.4.3.1 Wait Mode
When the MCU enters wait mode, the FTFL module is not affected. The FTFL module
can recover the MCU from wait via the command complete interrupt (see Interrupts).
28.4.3.2 Stop Mode
When the MCU requests stop mode, if an FTFL command is active (CCIF = 0) the
command execution completes before the MCU is allowed to enter stop mode.
28.4.3
Flash Operation in Low-Power Modes
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
618 Freescale Semiconductor, Inc.