Information

Table 28-33. Program Check Command FCCOB Requirements (continued)
FCCOB Number FCCOB Contents [7:0]
4 Margin Choice
8 Byte 0 expected data
9 Byte 1 expected data
A Byte 2 expected data
B Byte 3 expected data
1. Must be longword aligned (Flash address [1:0] = 00).
Upon clearing CCIF to launch the Program Check command, the FTFL sets the read
margin for 1s according to Table 28-34, reads the specified longword, and compares the
actual read data to the expected data provided by the FCCOB. If the comparison at
margin-1 fails, the MGSTAT0 bit is set.
The FTFL then sets the read margin for 0s, re-reads, and compares again. If the
comparison at margin-0 fails, the MGSTAT0 bit is set. The CCIF flag is set after the
Program Check operation completes.
The supplied address must be longword aligned (the lowest two bits of the byte address
must be 00):
• Byte 0 data is expected at the supplied address ('start'),
• Byte 1 data is expected at byte address start + 0b01,
• Byte 2 data is expected at byte address start + 0b10, and
• Byte 3 data is expected at byte address start + 0b11.
NOTE
See the description of margin reads, Margin Read Commands
Table 28-34. Margin Level Choices for Program Check
Read Margin Choice Margin Level Description
0x01 Read at 'User' margin-1 and 'User' margin-0
0x02 Read at 'Factory' margin-1 and 'Factory' margin-0
Table 28-35. Program Check Command Error Handling
Error Condition Error Bit
Command not available in current mode/security FSTAT[ACCERR]
An invalid flash address is supplied FSTAT[ACCERR]
Flash address is not longword aligned FSTAT[ACCERR]
An invalid margin choice is supplied FSTAT[ACCERR]
Either of the margin reads does not match the expected data FSTAT[MGSTAT0]
Chapter 28 Flash Memory Module (FTFL)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 629