Information

28.4.10.14.1 Swap State Determination
During the reset sequence, the state of the swap system is determined by evaluating the
IFR Swap Field in the program flash 1 IFR and the swap indicators located in each of the
program flash blocks at the swap indicator address stored in the IFR Swap Field.
Table 28-61. Program Flash 1 IFR Swap Field
Address Range Size (Bytes) Field Description
0x00 – 0x01 2 Swap Enable Word
0x02 – 0x03 2 Swap Indicator Address
0x04 – 0xFF 252 Reserved
28.4.11 Security
The FTFL module provides security information to the MCU based on contents of the
FSEC security register. The MCU then limits access to FTFL resources as defined in the
device's Chip Configuration details. During reset, the FTFL module initializes the FSEC
register using data read from the security byte of the Flash Configuration Field (see Flash
Configuration Field Description).
The following fields are available in the FSEC register. The settings are described in the
Flash Security Register (FTFL_FSEC) details.
Table 28-62. FSEC register fields
FSEC field Description
KEYEN Backdoor Key Access
MEEN Mass Erase Capability
FSLACC Freescale Factory Access
SEC MCU security
28.4.11.1 FTFL Access by Mode and Security
The following table summarizes how access to the FTFL module is affected by security
and operating mode.
Flash Operation in Low-Power Modes
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
648 Freescale Semiconductor, Inc.