Information
29.3.2 Chip select mask register (FB_CSMRn)
CSMRn registers specify the address mask and allowable access types for the respective
chip-selects.
Addresses: FB_CSMR0 is 4000_C000h base + 4h offset = 4000_C004h
FB_CSMR1 is 4000_C000h base + 10h offset = 4000_C010h
FB_CSMR2 is 4000_C000h base + 1Ch offset = 4000_C01Ch
FB_CSMR3 is 4000_C000h base + 28h offset = 4000_C028h
FB_CSMR4 is 4000_C000h base + 34h offset = 4000_C034h
FB_CSMR5 is 4000_C000h base + 40h offset = 4000_C040h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
BAM
0
WP
0
V
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FB_CSMRn field descriptions
Field Description
31–16
BAM
Base address mask
Defines the chip-select block size by masking address bits. Setting a BAM bit causes the corresponding
CSAR bit to be a don’t care in the decode.
The block size for FB_CSn is 2
n
; n = (number of bits set in respective CSMR[BAM]) + 16.
For example, if CSAR0[BA] equals 0x0040 and CSMR0[BAM] equals 0x0008, FB_CS0 addresses two
discontinuous 64 KB memory blocks: one from 0x40_0000 – 0x40_FFFF and one from 0x48_0000 –
0x48_FFFF.
Likewise, for
FB_CS0 to access 32 MB of address space starting at location 0x00_0000, FB_CS1 must
begin at the next byte after FB_CS0 for a 16 MB address space. Therefore, CSAR0[BA] equals 0x0000,
CSMR0[BAM] equals 0x01FF, CSAR1[BA] equals 0x0200, and CSMR1[BAM] equals 0x00FF.
0 Corresponding address bit is used in chip-select decode
1 Corresponding address bit is a don’t care in chip-select decode.
15–9
Reserved
This read-only field is reserved and always has the value zero.
8
WP
Write protect
Controls write accesses to the address range in the corresponding CSAR. Attempting to write to the range
of addresses for which CSARn[WP] is set results in a bus error termination of the internal cycle and no
external cycle.
0 Read and write accesses are allowed
1 Only read accesses are allowed
7–1
Reserved
This read-only field is reserved and always has the value zero.
0
V
Valid
Table continues on the next page...
Chapter 29 External Bus Interface (FlexBus)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 659