Information

Address
Address Data
TSIZ=11
AA=1
AA=0
AA=1
AA=0
Data Data Data
Add+1 Add+2 Add+3
FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB_ALE
FB_CSn
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
Figure 29-51. 32-bit-Read Burst from 8-Bit Port 3-1-1-1 (Address Setup and Hold)
The following figure shows a write cycle with one clock of address setup and address
hold.
Address
Address Data
TSIZ=11
AA=1
AA=0
AA=1
AA=0
Data Data Data
Add+1 Add+2 Add+3
FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB_ALE
FB_CSn
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
Figure 29-52. 32-bit-Write Burst to 8-Bit Port 3-1-1-1 (Address Setup and Hold)
Functional Description
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
696 Freescale Semiconductor, Inc.