Information

The compare value 2 register (CV2) is utilized only when the compare range function is
enabled (ACREN=1).
Addresses: ADC0_CV1 is 4003_B000h base + 18h offset = 4003_B018h
ADC0_CV2 is 4003_B000h base + 1Ch offset = 4003_B01Ch
ADC1_CV1 is 400B_B000h base + 18h offset = 400B_B018h
ADC1_CV2 is 400B_B000h base + 1Ch offset = 400B_B01Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CV
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADCx_CVn field descriptions
Field Description
31–16
Reserved
This read-only field is reserved and always has the value zero.
15–0
CV
Compare value
32.3.6 Status and control register 2 (ADCx_SC2)
The SC2 register contains the conversion active, hardware/software trigger select,
compare function and voltage reference select of the ADC module.
Addresses: ADC0_SC2 is 4003_B000h base + 20h offset = 4003_B020h
ADC1_SC2 is 400B_B000h base + 20h offset = 400B_B020h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
ADACT
ADTRG
ACFE
ACFGT
ACREN
DMAEN
REFSEL
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register Definition
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
734 Freescale Semiconductor, Inc.