Information

Table 3-6. Reference links to related information (continued)
Topic Related module Reference
Wake-up requests AWIC wake-up sources
3.2.3.1 Wake-up sources
The device uses the following internal and external inputs to the AWIC module.
Table 3-7. AWIC Stop and VLPS Wake-up Sources
Wake-up source Description
Available system resets RESET pin and WDOG when LPO is its clock source, and JTAG
Low-voltage detect Mode Controller
Low-voltage warning Mode Controller
Pin interrupts Port Control Module - Any enabled pin interrupt is capable of waking the system
ADCx The ADC is functional when using internal clock source
CMPx Since no system clocks are available, functionality is limited
I
2
C Address match wakeup
UART Active edge on RXD
USB Wakeup
LPTMR Functional in Stop/VLPS modes
RTC Functional in Stop/VLPS modes
SDHC Wakeup
I2S Wakeup
TSI
CAN
3.2.4 JTAG Controller Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 75