Information

33.8.1.2 Continuous Mode (#s 2A & 2B)
IRQ
INTERNAL BUS
INP
INM
FILTER_CNT
INV
COUT
COUT
OPE
SE
CMPO to
PAD
(TO OTHER SOC FUNCTIONS))
COUTA
1
WE
0
SE
CGMUX
COS
FILT_PER
0
+
-
FILT_PER
COS
IER/F CFR/F
WINDOW/SAMPLE
1
0
EN,PMODE,HYSTCTR[1:0]
Polarity
Select
Window
Control
Filter
Block
Interrupt
Control
divided
bus
clock
Clock
Prescaler
CMPO
bus clock
Figure 33-27. Comparator Operation in Continuous Mode
NOTE
Refer to the chip configuration section for the source of sample/
window input.
The analog comparator block is powered and active. CMPO may be optionally inverted,
but is not subject to external sampling or filtering. Both Window Control and Filter
Blocks are completely bypassed. SCR[COUT] is updated continuously. The path from
comparator inputs pins to output pin is operating in combinational (unclocked) mode.
COUT and COUTA are identical.
For control configurations which result in disabling the Filter Block, refer to Filter Block
Bypass Logic diagram.
CMP Functional Description
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
790 Freescale Semiconductor, Inc.