Information

37.3.20 Fault Control (FTMx_FLTCTRL)
This register selects the filter value for the fault inputs, enables the fault inputs and the
fault inputs filter.
Addresses: FTM0_FLTCTRL is 4003_8000h base + 7Ch offset = 4003_807Ch
FTM1_FLTCTRL is 4003_9000h base + 7Ch offset = 4003_907Ch
FTM2_FLTCTRL is 400B_8000h base + 7Ch offset = 400B_807Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
FFVAL
FFLTR3EN FFLTR2EN FFLTR1EN FFLTR0EN
FAULT3EN FAULT2EN FAULT1EN FAULT0EN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_FLTCTRL field descriptions
Field Description
31–12
Reserved
This read-only field is reserved and always has the value zero.
11–8
FFVAL
Fault Input Filter
Selects the filter value for the fault inputs.
The fault filter is disabled when the value is zero.
NOTE: Writing to this field has immediate effect and must be done only when the fault control or all fault
inputs are disabled. Failure to do this could result in a missing fault detection.
7
FFLTR3EN
Fault Input 3 Filter Enable
Enables the filter for the fault input.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Fault input filter is disabled.
1 Fault input filter is enabled.
6
FFLTR2EN
Fault Input 2 Filter Enable
Enables the filter for the fault input.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Fault input filter is disabled.
1 Fault input filter is enabled.
Table continues on the next page...
Chapter 37 FlexTimer (FTM)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 891