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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 32-Bit 100 MHz I/O number 52

Section Number Title Page

Chapter 9

Debug

9.1 Introduction...................................................................................................................................................................203

9.1.1 References....................................................................................................................................................205

9.2 The Debug Port.............................................................................................................................................................205

9.2.1 JTAG-to-SWD change sequence.................................................................................................................206

9.2.2 JTAG-to-cJTAG change sequence...............................................................................................................206

9.3 Debug Port Pin Descriptions.........................................................................................................................................207

9.4 System TAP connection................................................................................................................................................207

9.4.1 IR Codes.......................................................................................................................................................207

9.5 JTAG status and control registers.................................................................................................................................208

9.5.1 MDM-AP Control Register..........................................................................................................................209

9.5.2 MDM-AP Status Register............................................................................................................................211

9.6 Debug Resets................................................................................................................................................................212

9.7 AHB-AP........................................................................................................................................................................213

9.8 ITM...............................................................................................................................................................................214

9.9 Core Trace Connectivity...............................................................................................................................................214

9.10 Embedded Trace Macrocell v3.5 (ETM)......................................................................................................................214

9.11 Coresight Embedded Trace Buffer (ETB)....................................................................................................................215

9.11.1 Performance Profiling with the ETB...........................................................................................................215

9.11.2 ETB Counter Control...................................................................................................................................216

9.12 TPIU..............................................................................................................................................................................216

9.13 DWT.............................................................................................................................................................................216

9.14 Debug in Low Power Modes........................................................................................................................................217

9.14.1 Debug Module State in Low Power Modes.................................................................................................218

9.15 Debug & Security.........................................................................................................................................................218

Chapter 10

Signal Multiplexing and Signal Descriptions

10.1 Introduction...................................................................................................................................................................219

K20 Sub-Family Reference Manual, Rev. 6, Nov 2011

Freescale Semiconductor, Inc. 9