Information

Table 3-24. DMA request sources - MUX 0 (continued)
Source
number
Source module Source description
61 DMA MUX Always enabled
62 DMA MUX Always enabled
63 DMA MUX Always enabled
1. Configuring a DMA channel to select source 0 or any of the reserved sources disables that DMA channel.
3.3.9.2 DMA transfers via PIT trigger
The PIT module can trigger a DMA transfer on the first four DMA channels. The
assignments are detailed at PIT/DMA Periodic Trigger Assignments .
3.3.10 DMA Controller Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
DMA Controller
Crossbar switch
Requests
Peripheral
bridge 0
Register
access
Transfers
DMA Multiplexer
Figure 3-14. DMA Controller configuration
Table 3-25. Reference links to related information
Topic Related module Reference
Full description DMA Controller DMA Controller
System memory map System memory map
Register access Peripheral bridge
(AIPS-Lite 0)
AIPS-Lite 0
Clocking Clock distribution
Power management Power management
Transfers Crossbar switch Crossbar switch
System modules
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
90 Freescale Semiconductor, Inc.