Information

• and the deadtime delay is greater than or equal to the channel (n) duty cycle ((C(n
+1)V – C(n)V) × system clock), then the channel (n) output is always the inactive
value (POL(n) bit value).
• and the deadtime delay is greater than or equal to the channel (n+1) duty cycle
((MOD – CNTIN + 1 – (C(n+1)V – C(n)V) ) × system clock), then the channel (n+1)
output is always the inactive value (POL(n+1) bit value).
Although, in most cases the deadtime delay is not comparable to channels (n) and (n+1)
duty cycle, the following figures show examples where the deadtime delay is comparable
to the duty cycle.
FTM counter
channel (n+1) match
channel (n) match
channel (n) output
(before deadtime
insertion)
channel (n) output
(after deadtime
insertion)
channel (n+1) output
(before deadtime
insertion)
channel (n+1) output
(after deadtime
insertion)
Figure 37-230. Example of the Deadtime Insertion (ELSnB:ELSnA = 1:0, POL(n) = 0, and
POL(n+1) = 0) when the Deadtime Delay Is Comparable To Channel (n+1) Duty Cycle
FTM counter
channel (n+1) match
channel (n) match
channel (n) output
(before deadtime
insertion)
channel (n) output
(after deadtime
insertion)
channel (n+1) output
(before deadtime
insertion)
channel (n+1) output
(after deadtime
insertion)
Figure 37-231. Example of the Deadtime Insertion (ELSnB:ELSnA = 1:0, POL(n) = 0, and
POL(n+1) = 0) when the Deadtime Delay Is Comparable To Channels (n) and (n+1) Duty
Cycle
Functional Description
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
950 Freescale Semiconductor, Inc.