Datasheet
144
LQFP
144
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
— L5 RESERVED RESERVED RESERVED
— M5 NC NC NC
— A10 NC NC NC
— B10 NC NC NC
— C10 NC NC NC
1 D3 PTE0 ADC1_SE4a ADC1_SE4a PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 I2C1_SDA
2 D2 PTE1/
LLWU_P0
ADC1_SE5a ADC1_SE5a PTE1/
LLWU_P0
SPI1_SOUT UART1_RX SDHC0_D0 I2C1_SCL
3 D1 PTE2/
LLWU_P1
ADC1_SE6a ADC1_SE6a PTE2/
LLWU_P1
SPI1_SCK UART1_CTS_
b
SDHC0_DCLK
4 E4 PTE3 ADC1_SE7a ADC1_SE7a PTE3 SPI1_SIN UART1_RTS_
b
SDHC0_CMD
5 E5 VDD VDD VDD
6 F6 VSS VSS VSS
7 E3 PTE4/
LLWU_P2
DISABLED PTE4/
LLWU_P2
SPI1_PCS0 UART3_TX SDHC0_D3
8 E2 PTE5 DISABLED PTE5 SPI1_PCS2 UART3_RX SDHC0_D2
9 E1 PTE6 DISABLED PTE6 SPI1_PCS3 UART3_CTS_
b
I2S0_MCLK I2S0_CLKIN
10 F4 PTE7 DISABLED PTE7 UART3_RTS_
b
I2S0_RXD
11 F3 PTE8 DISABLED PTE8 UART5_TX I2S0_RX_FS
12 F2 PTE9 DISABLED PTE9 UART5_RX I2S0_RX_
BCLK
13 F1 PTE10 DISABLED PTE10 UART5_CTS_
b
I2S0_TXD
14 G4 PTE11 DISABLED PTE11 UART5_RTS_
b
I2S0_TX_FS
15 G3 PTE12 DISABLED PTE12 I2S0_TX_
BCLK
16 E6 VDD VDD VDD
17 F7 VSS VSS VSS
18 H3 VSS VSS VSS
19 H1 USB0_DP USB0_DP USB0_DP
20 H2 USB0_DM USB0_DM USB0_DM
21 G1 VOUT33 VOUT33 VOUT33
22 G2 VREGIN VREGIN VREGIN
23 J1 ADC0_DP1 ADC0_DP1 ADC0_DP1
24 J2 ADC0_DM1 ADC0_DM1 ADC0_DM1
25 K1 ADC1_DP1 ADC1_DP1 ADC1_DP1
26 K2 ADC1_DM1 ADC1_DM1 ADC1_DM1
27 L1 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
Pinout
K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc. 65
