Datasheet

One interval trigger output per DAC
One 16-bit delay interval register per DAC trigger output
Optional bypass the delay interval trigger registers
Optional external triggers
Up to eight pulse outputs (pulse-out's)
Pulse-out's can be enabled or disabled independently.
Programmable pulse width
4.5.6.2 FlexTimers (FTM)
Selectale FTM source clock
Programmable prescaler
16-bit counter supporting free-running or initial/final value, and countin is up or up-down
Input capture, output compare, and edge-aligned and center-aligned PWM modes
Input capture and output compare modes
Operation of FTM channels as pairs with equal outputs, pairs with complimentary outputs, or independent channels
with independent outputs
Deadtime insertion is available for each complementary pair
Generation of hardware triggers
Software control of PWM outputs
Up to 4 fault inputs for global fault control
Configurable channel polarity
Programmable interrupt on input capture, reference compare, overflowed counter, or detected fault condition
Quadrature decoder with input filters, relative position counting, and interrupt on position count or capture of position
count on external event
DMA support for FTM events
Global time base mode shares single time base across multiple FTM instances
4.5.6.3 Programmable Interrupt Timers (PITs)
Up to 4 general purpose interrupt timers
Up to 4 interrupt timers for triggering ADC conversions
32-bit counter resolution
Clocked by system clock frequency
DMA support
4.5.6.4 Low Power Timer
Operation as timer or pulse counter
Selectable clock for prescaler/glitch filter
1 kHz internal LPO
External low power crystal oscillator
Internal reference clock (not available in low leakage power modes)
Secondary external reference clock (for example, 32 kHz crystal)
Configurable glitch filter or prescaler
Interrupt generated on timer compare
Hardware trigger generated on timer compare
Timers
K30 Family Product Brief, Rev. 8, 5/2011
Freescale Semiconductor, Inc. 23