Datasheet

Memories and Memory Interfaces
Program
flash
RAM
12-bit DAC
x2
6-bit DAC
x3
CRC
interface
touch-sensing
Programmable
Analog
Timers
Communication InterfacesSecurity
and Integrity
SPI
x3
Carrier
modulator
transmitter
FlexMemory
Clocks
Frequency-
Core
Debug
interfaces
DSP
Interrupt
controller
comparator
x3
Analog
Voltage
reference
Secure
Digital
Low power
timer
Human-Machine
Interface (HMI)
GPIO
System
protection
Memory
DMA
Internal
watchdogs
and external
Low-leakage
wakeup
locked loop
Serial
programming
interface
Phase-
locked loop
reference
Internal
clocks
delay block
timers
interrupt
Periodic
External
bus
real-time
Independent
clock
oscillators
Low/high
frequency
UART
x6
Xtrinsic
®
Cortex™-M4ARM
Kinetis K30 Family
Migration difference from K10 family
LEGEND
I S
2
Segment
LCD
x2
I C
2
Timers
x3 (12ch)
CAN
x2
PGA
x2
16-bit ADC
x2
Figure 2. K30 Block Diagram
K30 Block Diagram
K30 Family Product Brief, Rev. 8, 5/2011
4 Freescale Semiconductor, Inc.