Datasheet

Table 1. Common features among all K30 devices (continued)
Analog • 16-bit SAR ADC
•
Programmable voltage reference (VREF)
• High-speed Analog comparator (CMP) with 6-bit DAC
Timers • 1x8ch motor control/general purpose/PWM flexible
timer (FTM)
•
1x2ch quadrature decoder/general purpose/PWM
flexible timer (FTM)
• Carrier modulator timer (CMT)
• Programmable delay block (PDB)
• 1x4ch programmable interrupt timer (PIT)
• Low-power timer (LPT)
Communications • SPI
•
I
2
C with SMBUS support
•
UART (w/ ISO7816, IrDA and hardware flow control)
Human-machine interface • GPIO with pin interrupt support, DMA request
capability, digital glitch filter, and other pin control
options
•
5V tolerant inputs
• Capacitive touch sensing inputs
• LCD display driver
• Supports 3V or 5V glass
• Configurable frontplane and backplane pins
• Segment failure detection mechanism
4.1.1 Memory and package options
The following table summarizes the memory and package options for the K30 family. All devices which share a common
package are pin-for-pin compatible.
Table 2. K30 family summary
Sub-Family
Performance (MHz)
Memory Package
Flash (KB)
FlexNVM (KB)
SRAM (KB)
EEPROM/ FlexRAM (KB)
64 LQFN (9x9)
64 LQFP (10x10) 80 LQFP (12x12)
81 BGA (8x8)
100 LQFP (14x14)
104BGA (8x8)
121 BGA (8x8)
144 LQFP (20x20)
144 BGA (13x13)
K30N 100 512 — 128 — — — + + + — + + +
K30X 72 64 32 16 2 + + + + — — — — —
72 128 32 32 2 + + + + + + — — —
72 256 32 64 2 + + + + + + — — —
100 128 128 32 4 — — — — — — — + +
100 256 256 64 4 — — — — — — — + +
Features
K30 Family Product Brief, Rev. 8, 5/2011
6 Freescale Semiconductor, Inc.