Datasheet

7 Dimensions
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to freescale.com and perform a keyword search for the
drawing’s document number:
If you want the drawing for this package Then use this document number
121-pin MAPBGA 98ASA00344D
8 Pinout
8.1 K60 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
121
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
E4 PTE0 ADC1_SE4a ADC1_SE4a PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 I2C1_SDA
E3 PTE1/
LLWU_P0
ADC1_SE5a ADC1_SE5a PTE1/
LLWU_P0
SPI1_SOUT UART1_RX SDHC0_D0 I2C1_SCL
E2 PTE2/
LLWU_P1
ADC1_SE6a ADC1_SE6a PTE2/
LLWU_P1
SPI1_SCK UART1_CTS_b SDHC0_DCLK
F4 PTE3 ADC1_SE7a ADC1_SE7a PTE3 SPI1_SIN UART1_RTS_b SDHC0_CMD
E7 VDD VDD VDD
F7 VSS VSS VSS
H7 PTE4/
LLWU_P2
DISABLED PTE4/
LLWU_P2
SPI1_PCS0 UART3_TX SDHC0_D3
G4 PTE5 DISABLED PTE5 SPI1_PCS2 UART3_RX SDHC0_D2
F3 PTE6 DISABLED PTE6 SPI1_PCS3 UART3_CTS_b I2S0_MCLK I2S0_CLKIN
E6 VDD VDD VDD
G7 VSS VSS VSS
L6 VSS VSS VSS
F1 USB0_DP USB0_DP USB0_DP
Dimensions
K60 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
68 Freescale Semiconductor, Inc.