Datasheet

121
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
B5 PTC15 PTC15 UART4_TX FB_AD24
D5 PTC16 PTC16 CAN1_RX UART3_RX ENET0_1588_
TMR0
FB_CS5_b/
FB_TSIZ1/
FB_BE23_16_b
C4 PTC17 PTC17 CAN1_TX UART3_TX ENET0_1588_
TMR1
FB_CS4_b/
FB_TSIZ0/
FB_BE31_24_b
B4 PTC18 PTC18 UART3_RTS_b ENET0_1588_
TMR2
FB_TBST_b/
FB_CS2_b/
FB_BE15_8_b
A4 PTC19 PTC19 UART3_CTS_b ENET0_1588_
TMR3
FB_CS3_b/
FB_BE7_0_b
FB_TA_b
D4 PTD0/
LLWU_P12
PTD0/
LLWU_P12
SPI0_PCS0 UART2_RTS_b FB_ALE/
FB_CS1_b/
FB_TS_b
D3 PTD1 ADC0_SE5b ADC0_SE5b PTD1 SPI0_SCK UART2_CTS_b FB_CS0_b
C3 PTD2/
LLWU_P13
PTD2/
LLWU_P13
SPI0_SOUT UART2_RX FB_AD4
B3 PTD3 PTD3 SPI0_SIN UART2_TX FB_AD3
A3 PTD4/
LLWU_P14
PTD4/
LLWU_P14
SPI0_PCS1 UART0_RTS_b FTM0_CH4 FB_AD2 EWM_IN
A2 PTD5 ADC0_SE6b ADC0_SE6b PTD5 SPI0_PCS2 UART0_CTS_b FTM0_CH5 FB_AD1 EWM_OUT_b
B2 PTD6/
LLWU_P15
ADC0_SE7b ADC0_SE7b PTD6/
LLWU_P15
SPI0_PCS3 UART0_RX FTM0_CH6 FB_AD0 FTM0_FLT0
A1 PTD7 PTD7 CMT_IRO UART0_TX FTM0_CH7 FTM0_FLT1
A10 PTD8 DISABLED PTD8 I2C0_SCL UART5_RX FB_A16
A9 PTD9 DISABLED PTD9 I2C0_SDA UART5_TX FB_A17
B1 PTD10 DISABLED PTD10 UART5_RTS_b FB_A18
C2 PTD11 DISABLED PTD11 SPI2_PCS0 UART5_CTS_b SDHC0_CLKIN FB_A19
C1 PTD12 DISABLED PTD12 SPI2_SCK SDHC0_D4 FB_A20
D2 PTD13 DISABLED PTD13 SPI2_SOUT SDHC0_D5 FB_A21
D1 PTD14 DISABLED PTD14 SPI2_SIN SDHC0_D6 FB_A22
E1 PTD15 DISABLED PTD15 SPI2_PCS1 SDHC0_D7 FB_A23
L7 RESERVED RESERVED RESERVED
A11 NC NC NC
B11 NC NC NC
C11 NC NC NC
K3 NC NC NC
H4 NC NC NC
Pinout
K60 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
72 Freescale Semiconductor, Inc.