Datasheet

1. Go to www.freescale.com.
2. Perform a keyword search for “EMC design.”
5.2.8 Capacitance attributes
Table 8. Capacitance attributes
Symbol Description Min. Max. Unit
C
IN_A
Input capacitance: analog pins — 7 pF
C
IN_D
Input capacitance: digital pins — 7 pF
C
IN_D_io60
Input capacitance: fast digital pins — 9 pF
5.3 Switching specifications
5.3.1 Device clock specifications
Table 9. Device clock specifications
Symbol Description Min. Max. Unit Notes
Normal run mode
f
SYS
System and core clock — 150 MHz
f
SYS_USBFS
System and core clock when Full Speed USB in
operation
20 — MHz
f
SYS_USBHS
System and core clock when High Speed USB in
operation
60 — MHz
f
ENET
System and core clock when ethernet in operation
• 10 Mbps
• 100 Mbps
5
50
—
—
MHz
f
BUS
Bus clock — 75 MHz
FB_CLK FlexBus clock — 50 MHz
f
FLASH
Flash clock — 25 MHz
f
LPTMR
LPTMR clock — 25 MHz
VLPR mode
1
f
SYS
System and core clock — 4 MHz
f
BUS
Bus clock — 4 MHz
FB_CLK FlexBus clock — 4 MHz
f
FLASH
Flash clock — 0.5 MHz
f
LPTMR
LPTMR clock — 4 MHz
1. The frequency limitations in VLPR mode here override any frequency specification listed in the timing specification for any
other module.
General
K60 Sub-Family, Rev5, 10/2013.
Freescale Semiconductor, Inc. 21