Datasheet
Table 15. MCG specifications (continued)
Symbol Description Min. Typ. Max. Unit Notes
• f
vco
= 180 MHz
• f
vco
= 360 MHz
—
—
100
75
—
—
ps
ps
J
acc_pll
PLL accumulated jitter over 1µs (RMS)
• f
vco
= 180 MHz
• f
vco
= 360 MHz
—
—
600
300
—
—
ps
ps
1. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock
mode).
2. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=0.
3. The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation
(Δf
dco_t
) over voltage and temperature should be considered.
4. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=1.
5. This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,
DMX32 bit is changed, DRS bits are changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
6. Excludes any oscillator currents that are also consuming power while PLL is in operation.
6.3.2 Oscillator electrical specifications
6.3.2.1 Oscillator DC electrical specifications
Table 16. Oscillator DC electrical specifications
Symbol Description Min. Typ. Max. Unit Notes
V
DD
Supply voltage 1.71 — 3.6 V
I
DDOSC
Supply current — low-power mode (HGO=0)
• 32 kHz
• 4 MHz
• 8 MHz (RANGE=01)
• 16 MHz
• 24 MHz
• 32 MHz
—
—
—
—
—
—
500
200
300
950
1.2
1.5
—
—
—
—
—
—
nA
μA
μA
μA
mA
mA
I
DDOSC
Supply current — high-gain mode (HGO=1)
• 32 kHz
• 4 MHz
• 8 MHz (RANGE=01)
• 16 MHz
• 24 MHz
• 32 MHz
—
—
—
—
—
—
25
400
500
2.5
3
4
—
—
—
—
—
—
μA
μA
μA
mA
mA
mA
1
Table continues on the next page...
Peripheral operating requirements and behaviors
K60 Sub-Family, Rev5, 10/2013.
Freescale Semiconductor, Inc. 31