Datasheet

144
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
F4 PTE7 DISABLED PTE7 UART3_RTS_b I2S0_RXD0 FTM3_CH2
F3 PTE8 ADC2_SE16 ADC2_SE16 PTE8 I2S0_RXD1 UART5_TX I2S0_RX_FS FTM3_CH3
F2 PTE9 ADC2_SE17 ADC2_SE17 PTE9 I2S0_TXD1 UART5_RX I2S0_RX_BCLK FTM3_CH4
F1 PTE10 DISABLED PTE10 UART5_CTS_b I2S0_TXD0 FTM3_CH5
G4 PTE11 ADC3_SE16 ADC3_SE16 PTE11 UART5_RTS_b I2S0_TX_FS FTM3_CH6
G3 PTE12 ADC3_SE17 ADC3_SE17 PTE12 I2S0_TX_BCLK FTM3_CH7
E6 VDD VDD VDD
F7 VSS VSS VSS
H3 VSS VSS VSS
H1 USB0_DP USB0_DP USB0_DP
H2 USB0_DM USB0_DM USB0_DM
G1 VOUT33 VOUT33 VOUT33
G2 VREGIN VREGIN VREGIN
J1 PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
J2 PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
K1 PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
K2 PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
L1 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
L2 PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
M1 PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
M2 PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
H5 VDDA VDDA VDDA
G5 VREFH VREFH VREFH
G6 VREFL VREFL VREFL
H6 VSSA VSSA VSSA
Pinout
K60 Sub-Family, Rev5, 10/2013.
Freescale Semiconductor, Inc. 85