Datasheet

Table 59. Revision History (continued)
Rev. No. Date Substantial Changes
4 10/2012 Replaced TBDs throughout.
5 10/2013 Changes for 4N96B mask set:
• Min VDD operating requirement specification updated to support operation down to
1.71V.
New specifications:
• Added Vodpu specification.
• Removed Ioz, Ioz_ddr, and Ioz_tamper Hi-Z leakage specficiations. They have been
replaced by new Iina, Iind, and Zind specifications.
• Fpll_ref_acc specification has been added.
• I
2
C module was previously covered by the general switching specifications. To provide
more detail on I
2
C operation a dedicated Inter-Integrated Circuit Interface (I
2
C) timing
section has been added.
Modified specifications:
• Vref_ddr max spec has been updated.
• Tpor spec has been split into two specifications based on VDD slew rate.
• Trd1allx and Trd1alln max have been updated.
• 16-bit ADC Temp sensor slope and Temp sensor voltage (Vtemp25) have been
modified. The typical values that were listed previously have been updated, and min
and max specifications have been added.
Corrections:
• Some versions of the datasheets listed incorrect clock mode information in the
"Diagram: Typical IDD_RUN operating behavior section." These errors have been
corrected.
• Fintf_ft specification was previously shown as a max value. It has been corrected to be
shown as a typical value as originally intended.
• Corrected DDR write and read timing diagrams to show the correct location of the Tcmv
specification.
• SDHC peripheral 50MHz high speed mode options were left out of the last datasheet.
These have been added to the SDHC specifications section.
Revision History
K60 Sub-Family, Rev5, 10/2013.
Freescale Semiconductor, Inc. 93