Datasheet

1
A DDR_VSS
B DDR_VDD
C DDR_DQ9
D DDR_DQ8
E PTF16
F PTF17
G PTF18
H PTF19
J PTE9
K PTE11
L VOUT33
M USB0_DP
N
PGA2_DP/
P
PGA3_DP/
R
PGA0_DP/
1
T
PGA1_DP/
2
DDR_DQ15
DDR_DQ11
DDR_DQ10
DDR_VDD
PTE0
PTE1/
PTE3
PTE6
PTE10
PTE17
VSS
USB0_DM
PGA2_DM/
PGA3_DM/
PGA0_DM/
2
PGA1_DM/
3
DDR_DM1
DDR_DQ14
DDR_DQ12
DDR_DQS1
DDR_VSS
PTE2/
PTE4/
PTE7
PTE16
PTE12
VREGIN
PTE19
ADC0_SE16/
ADC1_SE16/
DAC0_OUT/
3
VREF_OUT/
4
DDR_DQ2
DDR_DQ1
DDR_DQ13
DDR_VDD
PTD15
PTD13
PTE5
PTE8
PTD8
PTD6/
PTE18
VREFL
VSSA
VREFH
DAC1_OUT/
4
VSS
5
DDR_VSS
DDR_VDD
DDR_DQ0
DDR_VSS
PTD14
PTD12
PTD11
PTF20
PTD5
PTD4/
TAMPER1
TAMPER0/
VDDA
VBAT
TAMPER3
5
EXTAL32
6
DDR_DQ5
DDR_DQ3
DDR_VREF
DDR_DQ4
PTD10
PTF15
PTF14
PTF13
PTD3
PTD2/
TAMPER2
TAMPER7
TAMPER6
TAMPER4
TAMPER5
6
XTAL32
7
DDR_ODT
DDR_DQ6
DDR_VSS
DDR_VDD
PTD7
PTD9
VDD
VDDINT
VDD
PTE27
PTE28
PTE26
VSS
PTE24
PTE25
7
PTA0
8
DDR_DQ7
DDR_VDD
DDR_DQS0
DDR_VSS
DDR_VSS
PTD1
VDD
VSS
VSS
VSS
PTD0/
PTC19
PTA1
PTA3
PTA4/
8
PTA2
9
DDR_BA0
DDR_BA2
DDR_VSS
DDR_DM0
PTC17
PTC16
VDD
VSS
VSS
VSS
VSS
PTC18
PTF22
PTF21
PTF25
9
PTF26
10
DDR_CKB
DDR_BA1
DDR_A4
DDR_A0
DDR_VDD
PTC15
VDD
VDDINT
VDD
VDD
VDD
PTA12
PTA13/
PTF23
PTF24
10
PTF27
11
DDR_CK
DDR_A2
DDR_A1
DDR_A7
DDR_VSS
PTC9
PTC10
PTC11/
PTC14
PTF11
PTF12
PTB1
PTA16
PTA15
PTA14
11
PTA17
12
DDR_VSS
DDR_VDD
DDR_A3
DDR_VSS
DDR_VDD
PTC6/
PTC7
PTC8
PTC12
PTF9
PTF10
PTB0/
PTA8
PTA7
PTA6
12
PTA5
13
DDR_A5
DDR_A10
DDR_CAS_B
DDR_WE_B
PTC3/
PTC1/
PTB20
PTB17
PTB10
PTC13
PTF1
PTA26
PTA24
PTA10
PTA11
13
PTA9
14
DDR_A6
DDR_A11
DDR_VSS
DDR_CS_B
PTC4/
PTC2
PTB21
PTB18
PTB11
PTB8
PTB6
PTB3
PTA29
PTA28
PTA25
14
VSS
15
DDR_A8
DDR_A9
DDR_A12
DDR_A14
PTC5/
PTF7
PTB22
PTB19
PTB16
PTB9
PTB7
PTB5
PTB4
PTB2
PTA27
15
PTA18
16
ADDR_VSS
BDDR_CKE
CDDR_VDD
DDDR_A13
EDDR_RAS_B
FPTF8
GPTC0
HPTB23
JPTF6
KPTF5
LPTF4
MPTF3
NPTF2
PPTF0
RRESET_b
16
TPTA19
LLWU_P7
LLWU_P8 LLWU_P9
LLWU_P0 LLWU_P1 LLWU_P10 LLWU_P6
LLWU_P2
LLWU_P11
LLWU_P15 LLWU_P14 LLWU_P13
LLWU_P12
RTC_
WAKEUP_B
LLWU_P5
CMP1_IN2/
ADC0_SE21
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
LLWU_P4
CMP2_IN2/
ADC0_SE22
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
LLWU_P3
CMP0_IN4/
CMP2_IN3/
ADC1_SE23
CMP1_IN3/
ADC0_SE23
ADC0_DM0/
ADC1_DM3
ADC0_DP0/
ADC1_DP3
ADC1_DM0/
ADC0_DM3
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
ADC1_DP0/
ADC0_DP3
Figure 48. K70 256 MAPBGA Pinout Diagram
9 Revision History
The following table provides a revision history for this document.
Revision History
K70 Sub-Family Data Sheet, Rev. 5, 10/2013.
Freescale Semiconductor, Inc. 105