Datasheet

which are defined as:
input clock
T
SCALER
=
NFC
T
=
H
T
L
T
+
The SCALER value is derived from the fractional divider specified in the SIM's
CLKDIV4 register:
SCALER
=
SIM_CLKDIV4[NFCFRAC] + 1
SIM_CLKDIV4[NFCDIV] + 1
In case the reciprocal of SCALER is an integer, the duty cycle of NFC clock is 50%,
means T
H
= T
L
. In case the reciprocal of SCALER is not an integer:
(1 + SCALER / 2) x
=
L
T
NFC
T
2
(1 – SCALER / 2) x
=
H
T
NFC
T
2
For example, if SCALER is 0.2, then T
H
= T
L
= T
NFC
/2.
T
NFC
T
H
T
L
However, if SCALER is 0.667, then T
L
= 2/3 x T
NFC
and T
H
= 1/3 x T
NFC
.
T
NFC
T
H
T
L
NOTE
The reciprocal of SCALER must be a multiple of 0.5. For
example, 1, 1.5, 2, 2.5, etc.
Table 25. NFC specifications
Num Description Min. Max. Unit
t
CLS
NFC_CLE setup time 2T
H
+ T
L
– 1 — ns
t
CLH
NFC_CLE hold time T
H
+ T
L
– 1 — ns
t
CS
NFC_CEn setup time 2T
H
+ T
L
– 1 — ns
t
CH
NFC_CEn hold time T
H
+ T
L
— ns
t
WP
NFC_WP pulse width T
L
– 1 — ns
t
ALS
NFC_ALE setup time 2T
H
+ T
L
— ns
Table continues on the next page...
Peripheral operating requirements and behaviors
K70 Sub-Family Data Sheet, Rev. 5, 10/2013.
Freescale Semiconductor, Inc. 43