Datasheet

256
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
G4 PTE5 DISABLED PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 GLCD_D5 FTM3_CH0
H2 PTE6 DISABLED PTE6 SPI1_PCS3 UART3_CTS_b I2S0_MCLK GLCD_D6 FTM3_CH1 USB_SOF_
OUT
H1 PTF19 DISABLED PTF19 SPI2_SIN FTM1_CH1 UART5_RX GLCD_D15
H5 PTF20 DISABLED PTF20 SPI2_PCS1 FTM2_CH0 UART5_TX GLCD_D16
H3 PTE7 DISABLED PTE7 UART3_RTS_b I2S0_RXD0 GLCD_D7 FTM3_CH2
H4 PTE8 ADC2_SE16 ADC2_SE16 PTE8 I2S0_RXD1 UART5_TX I2S0_RX_FS GLCD_D8 FTM3_CH3
J1 PTE9 ADC2_SE17 ADC2_SE17 PTE9 I2S0_TXD1 UART5_RX I2S0_RX_BCLK GLCD_D9 FTM3_CH4
J2 PTE10 DISABLED PTE10 UART5_CTS_b I2S0_TXD0 GLCD_D10 FTM3_CH5
K1 PTE11 ADC3_SE16 ADC3_SE16 PTE11 UART5_RTS_b I2S0_TX_FS GLCD_D11 FTM3_CH6
K3 PTE12 ADC3_SE17 ADC3_SE17 PTE12 I2S0_TX_BCLK GLCD_D12 FTM3_CH7
G8 VDD VDD VDD
H9 VSS VSS VSS
J3 PTE16 ADC0_SE4a ADC0_SE4a PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN0 FTM0_FLT3
K2 PTE17 ADC0_SE5a ADC0_SE5a PTE17 SPI0_SCK UART2_RX FTM_CLKIN1 LPTMR0_ALT3
L4 PTE18 ADC0_SE6a ADC0_SE6a PTE18 SPI0_SOUT UART2_CTS_b I2C0_SDA
M3 PTE19 ADC0_SE7a ADC0_SE7a PTE19 SPI0_SIN UART2_RTS_b I2C0_SCL CMP3_OUT
L2 VSS VSS VSS
M1 USB0_DP USB0_DP USB0_DP
M2 USB0_DM USB0_DM USB0_DM
L1 VOUT33 VOUT33 VOUT33
L3 VREGIN VREGIN VREGIN
N1 PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
N2 PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
PGA2_DM/
ADC2_DM0/
ADC3_DM3/
ADC0_DM1
P1 PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
P2 PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
PGA3_DM/
ADC3_DM0/
ADC2_DM3/
ADC1_DM1
R1 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
R2 PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
Pinout
K70 Sub-Family Data Sheet, Rev. 5, 10/2013.
96 Freescale Semiconductor, Inc.