Datasheet

• AN2764: Improving the Transient Immunity Performance of Microcontroller-
Based Applications
• AN1259: System Design and Layout Techniques for Noise Reduction in MCU-
Based Systems
2.2.7 Capacitance attributes
Table 11. Capacitance attributes
Symbol Description Min. Max. Unit
C
IN
Input capacitance — 7 pF
2.3 Switching specifications
2.3.1 Device clock specifications
Table 12. Device clock specifications
Symbol Description Min. Max. Unit
Normal run mode
f
SYS
System and core clock — 48 MHz
f
BUS
Bus clock — 24 MHz
f
FLASH
Flash clock — 24 MHz
f
LPTMR
LPTMR clock — 24 MHz
VLPR and VLPS modes
1
f
SYS
System and core clock — 4 MHz
f
BUS
Bus clock — 1 MHz
f
FLASH
Flash clock — 1 MHz
f
LPTMR
LPTMR clock
2
— 24 MHz
f
ERCLK
External reference clock — 16 MHz
f
LPTMR_ERCLK
LPTMR external reference clock — 16 MHz
f
osc_hi_2
Oscillator crystal or resonator frequency — high frequency
mode (high range) (MCG_C2[RANGE]=1x)
— 16 MHz
f
TPM
TPM asynchronous clock — 8 MHz
f
UART0
UART0 asynchronous clock — 8 MHz
1. The frequency limitations in VLPR and VLPS modes here override any frequency specification listed in the timing
specification for any other module. These same frequency limits apply to VLPS, whether VLPS was entered from RUN
or from VLPR.
2. The LPTMR can be clocked at this speed in VLPR or VLPS only when the source is an external pin.
General
16 Kinetis KL05 32 KB Flash, Rev4 03/2014.
Freescale Semiconductor, Inc.