Datasheet

3.2 System modules
There are no specifications necessary for the device's system modules.
3.3 Clock modules
3.3.1 MCG specifications
Table 17. MCG specifications
Symbol Description Min. Typ. Max. Unit Notes
f
ints_ft
Internal reference frequency (slow clock) —
factory trimmed at nominal V
DD
and 25 °C
— 32.768 — kHz
f
ints_t
Internal reference frequency (slow clock) —
user trimmed
31.25 — 39.0625 kHz
Δ
fdco_res_t
Resolution of trimmed average DCO output
frequency at fixed voltage and temperature —
using C3[SCTRIM] and C4[SCFTRIM]
— ± 0.3 ± 0.6 %f
dco
1
Δf
dco_t
Total deviation of trimmed average DCO output
frequency over voltage and temperature
— +0.5/-0.7 ± 3 %f
dco
1, 2
Δf
dco_t
Total deviation of trimmed average DCO output
frequency over fixed voltage and temperature
range of 0–70 °C
— ± 0.4 ± 1.5 %f
dco
1, 2
f
intf_ft
Internal reference frequency (fast clock) —
factory trimmed at nominal V
DD
and 25 °C
— 4 — MHz
Δf
intf_ft
Frequency deviation of internal reference clock
(fast clock) over temperature and voltage —
factory trimmed at nominal V
DD
and 25 °C
— +1/-2 ± 3 %f
intf_ft
2
f
intf_t
Internal reference frequency (fast clock) — user
trimmed at nominal V
DD
and 25 °C
3 — 5 MHz
f
loc_low
Loss of external clock minimum frequency —
RANGE = 00
(3/5) x
f
ints_t
— — kHz
f
loc_high
Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
(16/5) x
f
ints_t
— — kHz
FLL
f
fll_ref
FLL reference frequency range 31.25 — 39.0625 kHz
f
dco
DCO output
frequency range
Low range (DRS = 00)
640 × f
fll_ref
20 20.97 25 MHz 3, 4
Mid range (DRS = 01)
1280 × f
fll_ref
40 41.94 48 MHz
f
dco_t_DMX3
2
DCO output
frequency
Low range (DRS = 00)
732 × f
fll_ref
— 23.99 — MHz 5, 6
Mid range (DRS = 01) — 47.97 — MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
20 Kinetis KL05 32 KB Flash, Rev4 03/2014.
Freescale Semiconductor, Inc.