Datasheet

Table 13. Device clock specifications (continued)
Symbol Description Min. Max. Unit
f
ERCLK
External reference clock — 16 MHz
f
LPTMR_ERCLK
LPTMR external reference clock — 16 MHz
f
osc_hi_2
Oscillator crystal or resonator frequency — high frequency
mode (high range) (MCG_C2[RANGE]=1x)
— 16 MHz
f
TPM
TPM asynchronous clock — 8 MHz
f
UART0
UART0 asynchronous clock — 8 MHz
1. The frequency limitations in VLPR and VLPS modes here override any frequency specification listed in the timing
specification for any other module. These same frequency limits apply to VLPS, whether VLPS was entered from RUN
or from VLPR.
2. The LPTMR can be clocked at this speed in VLPR or VLPS only when the source is an external pin.
2.3.2 General switching specifications
These general-purpose specifications apply to all signals configured for GPIO and
UART signals.
Table 14. General switching specifications
Description Min. Max. Unit Notes
GPIO pin interrupt pulse width (digital glitch filter disabled)
— Synchronous path
1.5 — Bus clock
cycles
1
External RESET and NMI pin interrupt pulse width —
Asynchronous path
100 — ns 2
GPIO pin interrupt pulse width — Asynchronous path 16 — ns 2
Port rise and fall time — 36 ns 3
1. The greater synchronous and asynchronous timing must be met.
2. This is the shortest pulse that is guaranteed to be recognized.
3. 75 pF load
2.4 Thermal specifications
2.4.1 Thermal operating requirements
Table 15. Thermal operating requirements
Symbol Description Min. Max. Unit
T
J
Die junction temperature –40 125 °C
T
A
Ambient temperature –40 105 °C
General
Kinetis KL24 Sub-Family, Rev4 03/2014. 17
Freescale Semiconductor, Inc.