Datasheet

J11
J12
J11
J9
J10
Input data valid
Output data valid
Output data valid
SWD_CLK
SWD_DIO
SWD_DIO
SWD_DIO
SWD_DIO
Figure 5. Serial wire data timing
3.2 System modules
There are no specifications necessary for the device's system modules.
3.3 Clock modules
3.3.1 MCG specifications
Table 18. MCG specifications
Symbol Description Min. Typ. Max. Unit Notes
f
ints_ft
Internal reference frequency (slow clock) —
factory trimmed at nominal V
DD
and 25 °C
— 32.768 — kHz
f
ints_t
Internal reference frequency (slow clock) —
user trimmed
31.25 — 39.0625 kHz
Δ
fdco_res_t
Resolution of trimmed average DCO output
frequency at fixed voltage and temperature —
using C3[SCTRIM] and C4[SCFTRIM]
— ± 0.3 ± 0.6 %f
dco
1
Table continues on the next page...
Peripheral operating requirements and behaviors
20 Kinetis KL24 Sub-Family, Rev4 03/2014.
Freescale Semiconductor, Inc.