Datasheet

3.4.1.1 Flash timing specifications — program and erase
The following specifications represent the amount of time the internal charge pumps
are active and do not include command overhead.
Table 21. NVM program/erase timing specifications
Symbol Description Min. Typ. Max. Unit Notes
t
hvpgm4
Longword Program high-voltage time — 7.5 18 μs
t
hversscr
Sector Erase high-voltage time — 13 113 ms 1
t
hversall
Erase All high-voltage time — 52 452 ms 1
1. Maximum time based on expectations at cycling end-of-life.
3.4.1.2 Flash timing specifications — commands
Table 22. Flash command timing specifications
Symbol Description Min. Typ. Max. Unit Notes
t
rd1sec1k
Read 1s Section execution time (flash sector) — — 60 μs 1
t
pgmchk
Program Check execution time — — 45 μs 1
t
rdrsrc
Read Resource execution time — — 30 μs 1
t
pgm4
Program Longword execution time — 65 145 μs
t
ersscr
Erase Flash Sector execution time — 14 114 ms 2
t
rd1all
Read 1s All Blocks execution time — — 1.8 ms
t
rdonce
Read Once execution time — — 25 μs 1
t
pgmonce
Program Once execution time — 65 — μs
t
ersall
Erase All Blocks execution time — 88 650 ms 2
t
vfykey
Verify Backdoor Access Key execution time — — 30 μs 1
1. Assumes 25 MHz flash clock frequency.
2. Maximum times for erase parameters based on expectations at cycling end-of-life.
3.4.1.3 Flash high voltage current behaviors
Table 23. Flash high voltage current behaviors
Symbol Description Min. Typ. Max. Unit
I
DD_PGM
Average current adder during high voltage
flash programming operation
— 2.5 6.0 mA
I
DD_ERS
Average current adder during high voltage
flash erase operation
— 1.5 4.0 mA
Peripheral operating requirements and behaviors
Kinetis KL24 Sub-Family, Rev4 03/2014. 25
Freescale Semiconductor, Inc.