Datasheet

80
LQFP
64
LQFP
48
QFN
32
QFN
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7
77 61 45 29 PTD4/
LLWU_P14
DISABLED PTD4/
LLWU_P14
SPI1_PCS0 UART2_RX TPM0_CH4
78 62 46 30 PTD5 ADC0_SE6b ADC0_SE6b PTD5 SPI1_SCK UART2_TX TPM0_CH5
79 63 47 31 PTD6/
LLWU_P15
ADC0_SE7b ADC0_SE7b PTD6/
LLWU_P15
SPI1_MOSI UART0_RX SPI1_MISO
80 64 48 32 PTD7 DISABLED PTD7 SPI1_MISO UART0_TX SPI1_MOSI
5.2 KL24 pinouts
The following figures show the pinout diagrams for the devices supported by this
document. Many signals may be multiplexed onto a single pin. To determine what
signals can be used on which pin, see KL24 Signal Multiplexing and Pin
Assignments.
Pinout
Kinetis KL24 Sub-Family, Rev4 03/2014. 41
Freescale Semiconductor, Inc.