Datasheet
Ordering Information
MPC5121E/MPC5123 Data Sheet, Rev. 5
Freescale Semiconductor 3
Figure 1 shows a simplified MPC5121e/MPC5123 block diagram.
Figure 1. Simplified MPC5121e/MPC5123 Block Diagram
1 Ordering Information
Table 1. MPC5121e Orderable Part Numbers
Freescale Part Number Speed (MHz)
Temperature
(ambient)
Qualification Package Availability
MPC5121VY400B 400 0
o
C to 70
o
C Consumer RoHS and Pb-free Tray
MPC5121VY400BR 400 0
o
C to 70
o
C Consumer RoHS and Pb-free Tape and Reel
MPC5121YVY400B 400 –40
o
C to 85
o
C Industrial RoHS and Pb-free Tray
MPC5121YVY400BR 400 –40
o
C to 85
o
C Industrial RoHS and Pb-free Tape and Reel
SPC5121YVY400B 400 –40
o
C to 85
o
C Automotive—AEC RoHS and Pb-free Tray
SPC5121YVY400BR 400 –40
o
C to 85
o
C Automotive—AEC RoHS and Pb-free Tape and Reel
Table 2. MPC5123 Orderable Part Numbers
Freescale Part Number Speed (MHz)
Temperature
(ambient)
Qualification Package Availability
MPC5123VY400B 400 0
o
C to 70
o
C Consumer RoHS and Pb-free Tray
MPC5123VY400BR 400 0
o
C to 70
o
C Consumer RoHS and Pb-free Tape and Reel
MPC5123YVY400B 400 –40
o
C to 85
o
C Industrial RoHS and Pb-free Tray
PMC
IPIC
WDT
GPT
GPIO
I
2
C×3
CAN × 4
J1850
SDHC
SPDIF
CFM
PSC × 12
RTC
83 MHz (max) IP Bus
Display
DDR1/DDR2 Memory
Functionally
Multiplexed I/O
LPC
NFC
PATA
EMB
83 MHz IP Bus
AXE
Engine
8KB
DIU
Multi-Port
Memory Controller
MBX Lite
Graphics Engine with
Vector Processing
FEC
USB2
+ PHY
USB2
ULPI
SATA
+ PHY
PCI
200 MHz AHB (32-bit)
Temp F us e
128 KB
SRAM
DMA
64-Channel
e300
Power Architecture
32 KB Instruction Cache
32 KB Data Cache
200 MHz CSB
Bus (64-bit)
RESET/
JTAG/COP
CLOCK
Instruc-
VIU
not available in MPC5123
tion
Cache
