Datasheet

MPC5121E/MPC5123 Data Sheet, Rev. 5
Electrical and Thermal Characteristics
Freescale Semiconductor42
3.3.7.2 MUXed Mode
3.3.7.2.1 MUXed Non-Burst Mode
Figure 18. Timing Diagram – MUXed Non-Burst Mode
NOTE
ACK is asynchonous input signal and has no timing requirements. ACK needs to be
deasserted after
CS[x] is deasserted.
LPC_CLK
AD[31:0] (wr)
CS[x]
R/W
ALE
Address
TS
Valid Write Data
AD[31:0] (rd)
OE
Address
ACK
t
18
t
4
t
5
t
22
t
3
t
17
t
7
t
6
TSIZ[1:0]