Datasheet

MPC5121E/MPC5123 Data Sheet, Rev. 5
Electrical and Thermal Characteristics
Freescale Semiconductor62
3.3.12 USB ULPI
This section specifies the USB ULPI timing.
For more information refer to UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20, 2004.
Figure 40. ULPI Timing Diagram
NOTE
Output timing is specified at a nominal 50 pF load.
3.3.13 On-Chip USB PHY
The USB PHY is an USB2.0 compatible PHY integrated on-chip. See Chapter 7 in the USB Specification Rev. 2.0 at
www.usb.org.
3.3.14 SDHC
Figure 41 shows the timings of the SDHC.
Table 36. Timing Specifications – ULPI
Symbol Description Min Max Units SpecID
T
CK
Clock Period 15 — ns A12.1
T
SC
, T
SD
Setup time (control in, 8-bit data in) — 6.0 ns A12.2
T
HC
, T
HD
Hold time (control in, 8-bit data in) 0.0 — ns A12.3
T
DC
, T
DD
Output delay (control out, 8-bit data out) — 9.0 ns A12.4
Clock
T
SC
T
HC
T
SD
T
HD
T
DC
T
DC
T
DD
Control In
(dir, nxt)
Data In
(8-bit)
Control Out
(stp)
Data Out
(8-bit)