Datasheet

MPC5121E/MPC5123 Data Sheet, Rev. 5
System Design Information
Freescale Semiconductor82
For a board with a COP (common on-chip processor) connector that accesses the JTAG interface and needs to reset the JTAG
module, only wiring
TRST and PORESET is not recommended.
To reset the MPC5121e/MPC5123 via the COP connector, the HRESET pin of the COP should be connected to the HRESET
pin of the MPC5121e/MPC5123. The circuitry shown in
Figure 63 allows the COP to assert HRESET or TRST separately,
while any other board sources can drive PORESET.
Table 53. COP / BDM Interface Signals
BDM Pin # MPC5121e/MPC5123 I / O Pin BDM Connector
Internal
Pull Up / Down
External
Pull Up / Down
I / O
1
1
With respect to the emulator tool’s perspective:
Input is really an output from the embedded e300 core.
Output is really an input to the core.
16 — GND — — —
15 CKSTP_OUT ckstp_out — 10 k Pull-up I
14 — KEY — — —
13 HRESET hreset Pull-up 10 k Pull-up O
12 — GND — — —
11 SRESET sreset Pull-up 10 k Pull-up O
10 — N / C — — —
9 TMS tms Pull-up 10 k Pull-up O
8 CKSTP_IN ckstp_in — 10 k Pull-up O
7 TCK tck Pull-up 10 k Pull-up O
6 — VDD
2
2
From the board under test, power sense for chip power.
— — —
5 See Note
3
3
HALTED is not available from e300 core.
halted
3
— — I
4 TRST trst Pull-up 10 k Pull-up O
3 TDI tdi Pull-up 10 k Pull-up O
2 See Note
4
4
Input to the e300 core to enable / disable soft-stop condition during breakpoints. MPC5121e/MPC5123
internally ties CORE_QACK to GND in its normal
/ functional mode (always asserted).
qack
4
— — O
1 TDO tdo — — I