Datasheet

System Design Information
MPC5121E/MPC5123 Data Sheet, Rev. 5
Freescale Semiconductor 83
Figure 63. COP Connector Diagram
4.5.2.2 Boards Without COP Connector
If the JTAG interface is not used, TRST should be tied to PORESET, so that it is asserted when the system reset signal
(
PORESET) is asserted. This ensures that the JTAG scan chain is initialized during power on. Figure 64 shows the connection
of the JTAG interface without COP connector.
1
3
5
7
9
11
13
15
2
4
6
8
10
12
K
16
14
HRESET
SRESET
V
DD_IO
V
DD_IO
TRST
V
DD_IO
TMS
V
DD_IO
TCK
V
DD_IO
TDI
CKSTP_OUT
TDO
3
11
16
4
9
12
7
6
2
15
1
10
5
(3)
2
(4)
13
NC
NC
NC
TDO
HRESET
SRESET
TRST
TMS
TCK
TDI
CKSTP_OUT
V
DD_IO
10 k 
10 k 
10 k 
10 k 
10 k 
COP Header
COP Connector
Physical Pinout
halted
qack
V
DD_IO
10 k 
PORESET
PORESET
V
DD_IO
10 k 
CKSTP_IN (LPC_CLK)
8
CKSTP_IN
V
DD_IO
10 k 