Datasheet

MPC5121E/MPC5123 Data Sheet, Rev. 5
Product Documentation
Freescale Semiconductor87
6 Product Documentation
This Data Sheet is labeled as a particular type: Product Preview, Advance Information, or Technical Data. Definitions of these
types are available at: http://www.freescale.com.
Table 55 provides a revision history for this document.
Table 55. Document Revision History
Revision Substantive Change(s)
Rev. 0, DraftA First Draft (5/2008)
Rev. 0, DraftB Second Draft (5/2008)
Rev. 0, DraftC Third Draft (7/2008)
Rev. 1 Advance Information (10/2008)
Rev. 2 Technical Data (2/2009)
Rev. 3 Technical Data (2/2009). Corrected Table 5, Footnote 3.
Rev. 3.1 Technical Data (12/2009). Interim release for removing AVDD_FUSERD
throughout document, changing pin D9 to VDD_IO, and adding D9 to list of
pins for VDD_IO.
Rev. 4 Technical Data (1/2010). Minor editorial and graphical updates. 
No technical updates.
Rev 5 — Updated table “DDR and DDR2 SDRAM Timing Specification”, removed
the row of ‘MCK AC differential crosspoint voltage' .
— Updated table “Thermal Resistance Data”.
— Added table “NFC Timing Characteristics in Symmetric Mode ”and
added figure “Read data latch timing in Symmetric Mode”.
—Published as Rev. 5