Datasheet

MPC5566 Microcontroller Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor28
Figure 6. JTAG Test Clock Input Timing
12 TCK falling-edge to output valid out of high impedance t
BSDVZ
—50ns
13 TCK falling-edge to output high impedance (Hi-Z) t
BSDHZ
—50ns
14 Boundary scan input valid to TCK rising-edge t
BSDST
50 — ns
15 TCK rising-edge to boundary scan input invalid t
BSDHT
50 — ns
1
These specifications apply to JTAG boundary scan only. JTAG timing specified at: V
DDE
= 3.0–3.6 V and T
A
= T
L
to T
H
.
Refer to Tabl e 21 for Nexus specifications.
Table 20. JTAG Pin AC Electrical Characteristics
1
(continued)
Spec Characteristic Symbol Min. Max. Unit
TCK
1
2
2
3
3