Datasheet

Electrical Characteristics
MPC5566 Microcontroller Data Sheet, Rev. 3
Freescale
35
7a
Input signal valid to CLKOUT
positive edge (setup time)
Calibration bus interface
CAL_ADDR[9:30]
CAL_DATA[0:15]
CAL_RD_WR
CAL_TS
t
CCIS
11.0 — 8.0 — 6.0 — 4.0 — ns
8
CLKOUT positive edge to
input signal invalid (hold time)
External bus interface
ADDR[8:31]
DATA[0:31]
BG
7
BR
5
BB
RD_WR
TA
TEA
TS
TSIZ[0:1]
t
CIH
1.0 — 1.0 — 1.0 — 1.0 — ns
CLKOUT positive edge to
input signal invalid (hold time)
Calibration bus interface
CAL_ADDR[9:30]
CAL_DATA[0:15]
CAL_RD_WR
CAL_TS
t
CCIH
1.0 — 1.0 — 1.0 — 1.0 — ns
1
EBI timing specified at V
DDE
= 1.6–3.6 V (unless stated otherwise), T
A
= T
L
to T
H
, and CL = 30 pF with DSC = 0b10.
2
Speed is the nominal maximum frequency. Max speed is the maximum speed allowed including frequency modulation (FM):
82 MHz parts allow for 80 MHz system clock + 2% FM; 114 MHz parts allow for 112 MHz system clock + 2% FM;
135 MHz parts allow for 132 MHz system clock + 2% FM; and 147 MHz parts allow for 144 MHz system clock + 2% FM.
3
The external bus is limited to half the speed of the internal bus.
4
Refer to fast pad timing in Table 17 and Tab le 18 (different values for 1.8 V and 3.3 V).
5
Internal arbitration.
6
EBTS = 0 timings are tested and valid at V
DDE
= 2.25–3.6 V only; EBTS = 1 timings are tested and valid at V
DDE
= 1.6–3.6 V.
7
External arbitration.
Table 22. Bus Operation Timing
1
Spec
Characteristic
and
Description
Symbol
External Bus Frequency
2, 3
Unit
Notes
40 MHz 56 MHz 67 MHz 72 MHz
Min Max Min Max Min Max Min Max