Datasheet
MPC5566 Microcontroller Data Sheet, Rev. 3
Mechanicals
Freescale Semiconductor50
4 Mechanicals
4.1 MPC5566 416 PBGA Pinout
Figure 32, Figure 33, and Figure 34 show the pinout for the MPC5566 416 PBGA package. The alternate
Fast Ethernet Controller (FEC) signals are multiplexed with the data calibration bus signals.
NOTE
The MPC5500 devices are pin compatible for software portability and use
the primary function names to label the pins in the BGA diagram. Although
some devices do not support all the primary functions shown in the BGA
diagram, the muxed and GPIO signals on those pins remain available. See
the signals chapter in the device reference manual for the signal muxing.
Figure 32. MPC5566 416 Package
VSS
1 2 3 4 5 6 7 8 9 1011121314151617181920212223242526
AN35
VSTBY AN37 AN11 VDDA1 AN16
AN5 VRH AN23 AN27 AN28 VSSA0 AN15 MDO11 MDO8 VDD VDD33 VSS
A
VDD
AN32
VSS AN36 AN39 AN19 AN20
AN4 AN22 AN26 AN31 VSSA0 AN14 MDO10 MDO7 MDO4 MDO0 VSS VDDE7
B
VDD33
AN33
VDD VSS AN8 AN17 VSSA1
AN3 AN7 VRL AN25 AN30 VDDA0 AN13 MDO9 MDO6 MDO3 MDO1 VSS VDDE7 VDD
C
AN34
VDD VSS AN38 AN9
AN18 AN2 AN6 AN24 AN29 AN12 MDO5 MDO2 VSS VDDE7 TCK TDI
D
VDD
VDDE7 TMS TDO TEST
E
MSEO0 JCOMP EVTI EVTO
F
MSEO1 MCKO
G
RDY
H
J
VSSVSS VSS VSS VDDE7 VDDE7 VDDE7 VDDE7
K
VSSVSS VSS VSS VSS VSS VSS VDDE7
L
VSSVDDE2 VDDE2 VSS VSS VSS VSS VDDE7 SINB
M
BDIP
VSS
TEA
VDDE2 VDDE2 VSS VSS VSS VSS VDDE7 SOUTB PCSB3 PCSB0 PCSB1
N
CS3
VSS
CS2 CS1 CS0
VDDE2 VDDE2 VSS VSS VSS VSS VSS PCSA3 PCSB4 SCKB PCSB2
P
WE3
VSS
WE2 WE1 WE0
VDDE2 VDDE2 VSS VSS VSS VSS VSS PCSB5 SOUTA SINA SCKA
R
VDDE2
VDDE2
TSIZ0 RD_WR VDDE2
VDDE2 VSS VDDE2 VDDE2 VDDE2 VSS VSS PCSA1 PCSA0 PCSA2 VPP
T
VDDE2
TSIZ1 TA VDD33
VSS VDDE2 VDDE2 VDDE2 VDDE2 VSS VSS PCSA4 TXDA PCSA5 VFLASH
U
TS
CNTXC RXDA
RSTOUT
V
RXDB CNRXC TXDB RESET
W
VDDE2Y
EXTAL
AA
VDDE2
VDD XTAL
AB
VDDE2
VSS VDD
VDDE2 VDDE5 NC VSS VDD VRC33
AC
VSS VDD
VDD33 CNTXA VDDE5 NC VSS VDD VDD33
AD
BR
VSS VDD
OE BG CNRXA VDDE5 CLKOUT VSS VDD
AE
VSS VDD VDDE2
VDDE2 BB CNTXB CNRXB VDDE5 VSS
AF
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
1 2 3 4 5 6 7 8 9 1011121314151617181920212223242526
AN10
AN21
AN0
AN1
ETRIG
1
ETPUB
18
ETPUB
20
ETPUB
24
ETPUB
27
GPIO
205
ETRIG
0
ETPUB
21
ETPUB
25
ETPUB
28
ETPUB
31
ETPUB
19
ETPUB
22
ETPUB
26
ETPUB
30
ETPUA
30
ETPUA
31
VDDEH
9
ETPUB
16
ETPUB
17
ETPUB
23
ETPUB
29
VDDEH
8
VDDEH
1
ETPUA
28
ETPUA
29
VDDEH
1
ETPUA
24
ETPUA
27
ETPUA
26
ETPUA
23
ETPUA
22
ETPUA
25
ETPUA
21
ETPUA
20
ETPUA
19
ETPUA
18
ETPUA
17
ETPUA
16
ETPUA
15
ETPUA
14
ETPUA
13
ETPUA
12
ETPUA
11
ETPUA
10
ETPUA
9
ETPUA
8
ETPUA
7
ETPUA
6
ETPUA
5
ETPUA
4
ETPUA
3
ETPUA
2
ETPUA
1
ETPUA
0
TCRCLK
A
VDDEH
6
GPIO
204
ETPUB
15
GPIO
203
ETPUB
14
ETPUB
13
ETPUB
11
ETPUB
9
ETPUB
12
ETPUB
7
ETPUB
5
ETPUB
8
ETPUB
10
ETPUB
3
ETPUB
2
ETPUB
4
ETPUB
6
ETPUB
0
ETPUB
1
TCRCLK
B
ADDR
16
ADDR
18
ADDR
17
ADDR
8
ADDR
20
ADDR
19
ADDR
10
ADDR
9
ADDR
22
ADDR
21
ADDR
11
ADDR
24
ADDR
23
ADDR
12
ADDR
13
ADDR
25
ADDR
14
ADDR
15
ADDR
26
ADDR
27
ADDR
31
ADDR
28
ADDR
30
ADDR
29
DATA
16
DATA
18
DATA
17
DATA
19
DATA
24
DATA
21
DATA
25
DATA
26
DATA
20
DATA
23
DATA
27
DATA
28
DATA
22
GPIO
207
GPIO
206
DATA
0
DATA
29
DATA
30
DATA
31
DATA
8
DATA
9
DATA
2
DATA
4
DATA
6
DATA
1
DATA
3
DATA
11
DATA
10
DATA
13
DATA
5
DATA
7
DATA
15
DATA
12
DATA
14
EMIOS
3
EMIOS
1
EMIOS
0
EMIOS
6
EMIOS
5
EMIOS
4
EMIOS
2
EMIOS
10
EMIOS
9
EMIOS
7
EMIOS
8
EMIOS
15
EMIOS
13
EMIOS
11
EMIOS
12
EMIOS
17
EMIOS
16
EMIOS
14
EMIOS
21
EMIOS
22
EMIOS
19
EMIOS
18
EMIOS
23
EMIOS
20
VDDEH
4
BOOT
CFG1
VDDEH
6
PLL
CFG1
BOOT
CFG0
WKP
CFG
VRC
VSS
VSS
SYN
VRC
CTL
PLL
CFG0
VDD
SYN
RST
CFG
ENG
CLK
Note: No connect. AC22 & AD23 reserved
NC
REF
BYPC